Specifications and benchmarks of the Tensor G5 surfaced last year ahead of Pixel 10 launch later this year. We already know that for the first time, Google will use TSMC’s 3nm-class process in the Tensor G5 instead of relying on Samsung. Latest report from Android Authority reveals more details about the chip.
Earlier report revealed that the Tensor G5 will usePowerVR two-core IMG DXT-48-1536 clocked at 1.1GHz, a change from Arm Mali GPU. This reveals that Google will use next-generation Google EdgeTPU and next-gen Google GXP DSP, while retaining Google Emerald Hill memory compressor and Google AoC audio processor.
For the first time, Google will use fully custom Google ISP instead of using Samsung ISP with custom Google blocks, says the report, and adds that Google will use VeriSilicon DC9000 Display controller/2D GPU and Chips&Media WAVE677DV video codec for up to 4K120 encoding and decoding in AV1, VP9, HEVC and H.264, a change from custom ‘BigWave’ AV1 video codec.
Even though this is said to retain Synopsys DesignWare USB3 for the USB, Google has partnered with various IP providers such as Synopsys, SmartDV Technologies, and others. It is also expected to use a third-party vendor for UFS controller, but the exact name is not available.
Despite switching to TSMC’s manufacturing, the Tensor G5 will largely resemble its predecessors, retaining Google’s limited custom components and relying heavily on externally sourced, generic parts.